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KS16120B
DSP for Digital Answering phone with ARAM interface
Preliminary
INTRODUCTION
KS16120B is a digital signal processor IC that implements all the
functions and hardware interfaces necessary for voice compression,
storage and digital telephone answerer.
The basic functions include low bit rate speech compression, efficient
ARAM management through parity checks and table look-ups, DTMF
tone generation and detection, call progress tone detection and high
quality voice prompts.
The on-chip interface units provide the access to 4M/16M ARAM,
ROM/EPROM and two PCM codecs without any glue logic.
All the clock and control signals, including ARAM refresh, are generated
on-chip. KS16120B supports a simple command / status interface
protocol for an external host controller. The host writes commands to
activate various modes of operations supported by the DSP and read
status words to monitor its operation.
KS16120B is manufactured with SAMSUNG 0.8 CMOS technology that
guarantees reliable performance with low power dissipation.
KS16120B is packaged in a 80-pin plastic QFP.
80-QFP-1420C
1
ORDERING INFORMATION
Device
Package Operating Temperature
++KS16120BQ
80 - QFP - 1420C
- 20 ~ + 70
FEATURES
++ Under development
¤ High-performance speech compression algorithm
¤ Voice activation and silence compaction for longer recording time
¤ Advanced audio-grade RAM (ARAM) management for maximum
recording time and reliable data storage
¤ DTMF detection with near-end echo cancellation, and programmable tone generation
¤ Programmable call progress tone detection for busy and /or dial tones
¤ Supports high-quality voice prompts from ROM or EPROM up to 64Kbytes
¤ Supports multiple message attributes for time stamp, mail box and other applications
¤ Storage for 128 voice messages and 128 16-bit data or 32 telephone numbers
¤ 8-bit host interface
¤ Supports up to four 1Mx4 or one 4Mx4 ARAMs, refreshed during power-down operation
¤ 80-pin PQFP package
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KS16120B
DSP for Digital Answering phone with ARAM interface
Preliminary
BLOCK DIAGRAM
KS16120B
ROM/EPROM
for
Voice Prompt
Program ROM
Host
Inter-
face
Host
Memory
Interface
DSP Core
Codec
Inter-
face
Codec
Audio RAM
( 1Mx4 or
4Mx4 )
Data RAM
Figure 1 Block Diagram of KS16120B
CHIP CONFIGURATION
¤ KS16120B
: SAMSUNG DSP for Digital Answering Phone with ARAM Interface (80 QFP)
¤ KS8620 / KT8554
: Analog in / out interface (-law PCM CODEC ) -- 16DIP / 16WIDE SOP
¤ SA5040A
: SAMSUNG ARAM with 1M x 4 (4M) or 4M x 4 (16M) organization ( 20 SOJ )
¤ External ROM / EPROM
: Each 64K-bytes block can supports up to 98.5 seconds of Voice prompts
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KS16120B
DSP for Digital Answering phone with ARAM interface
Preliminary
PIN CONFIGURATION
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
V DD
1
64
HD7
V SS
2
63
V SS
CAS3B
3
62
V DD
CAS4B
4
61
HREQB
ADD0
5
60
HWB
ADD1
6
59
HRB
ADD2
7
58
HLB
ADD3
8
57
DATF
ADD4
9
56
DR2
ADD5
10
55
DR1
ADD6
11
54
FSYNC
ADD7
12
KS16120B
53
V SS
ADD8
13
52
V DD
ADD9
14
51
BCLK
ADD10
15
50
APD2
ADD11
16
49
APD1
V DD
17
48
DX2
V SS
18
47
DX1
ADD12
19
46
RESETB
ADD13
20
45
PDNB
ADD14
21
44
NC
ADD15
22
43
NC
DQ7
23
42
V SS
DQ6
24
41
V DD
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
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KS16120B
DSP for Digital Answering phone with ARAM interface
Preliminary
PIN DESCRIPTION
Pin Name Pin
Type
DESCRIPTION
HD[7:0]
HWB
64 - 71
60
I/O
I
Host data bus for host instructions and status words from the KS16120B. Pull-up.
Host Write Strobe. A low-to-high transition loads an instruction to the KS16120B.
HRB
HLB
59
58
I
I
Host Read Strobe. The KS16120B writes a status word to the host data bus.
Lower Byte Select. 16-bit command and status words are written or read 8 bits at a
time. When low, this signal indicates that lower byte is selected.
HREQB
61
O
Host Read Request. Indicates that a status word is ready for the host to read. Active
Low. Goes inactive when the higher byte of a status word is read by the host.
Not used.
DATF
57
O
BCLK
FSYNC
APD1
51
54
49
O
O
O
PCM Data Receive/Transmit Bit Clock for Codec 1 and 2. ( 2.048MHz clock )
PCM Data Receive/Transmit Frame Sync for Codec 1 and 2.
Codec 1 Inactive Flag. When set, it indicates the codec is not used and may be
DX1
DR1
47
55
O
I
powered down.
PCM data Transmit pin to Codec 1. Serial data output from KS16120B to codec.
PCM Data Receive pin from Codec 1. Serial data output from codec to KS16120B. Pull-up.
APD2
50
O
Codec 2 inactive Flag. When set, it indicates the codec is not used and may be
powered down.
DX2
DR2
ADD[15:0]
48
56
22-19,16-5
O
I
O
PCM data transmit pin to Codec 2. Serial data output from KS16120B to codec.
PCM data Receive pin from Codec 2. Serial data output from codec to KS16120B. Pull-up.
Address Bus for ARAMs and ROM/EPROM. 10 or 11 LSBs are used for 4M or 16M
ROEB
RASB
74
76
O
O
ARAMs, respectively.
ROM Output Enable. Active Low.
ARAM Row Address Strobe. Active Low.
Column Address Strobe for first ARAM. Active Low.
CAS1B
CAS2B
CAS3B
79
80
3
O
O
O
Column Address Strobe for second ARAM. Active Low.
Column Address Strobe for third ARAM. Active Low.
CAS4B
WB
4
75
O
O
Column Address Strobe for fourth ARAM. Active Low.
ARAM Read/Write Control. Low for write cycle.
ARAM Type (4/16M) Select. Indicates 4M when High, 16M otherwise. Pull-up.
M16
DQ[7:0]
XI
35
23 - 30
39
I
I/O
I
Data bus for ARAMs and ROM/EPROM. 4 LSBs are used for ARAMs. Pull-up.
Crystal Input Pin. 24.576MHz.
Crystal Output Pin.
XO
RESETB
PDNB
40
46
45
O
I
I
System Reset. Active Low.
System Power Down. Active Low.
No connection. Pull-up.
NC
NC
NC
44,43
31
32
I
I
I
No connection. Pull-up.
No connection. Pull-up.
NC
VDD
36,37,38
1,17,33,41,52
62,72,77
I
I
No connection. Pull-up.
Chip Power Supply (5V)
VSS
2,18,34,42,53,
63,73,78
I
Chip Ground.
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KS16120B
DSP for Digital Answering phone with ARAM interface
Preliminary
ABSOLUTE MAXIMUM RATINGS (Ta = 25 )
Characteristics
Symbol
Value
Unit
Supply Voltage
V DD
V IN
V G
T STG
7
V
Input Voltage
Output Voltage
V SS - 0.5 to V DD + 0.5
V SS -0.5 to V DD + 0.5
- 65 to +150
V
V
Storage Temperature
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min.
Typ.
Max.
Unit
Power Supply Voltage
Ground Voltage
Operating Temperature
Crystal Frequency
High-level input Voltage
Low-level input Voltage
Current with high-level output
Current with low-level output
V DD
V SS
T OPR
F CK
V IH
V IL
I OH
I OL
4.5
-
0
-
3
-
-
-
5
0
-
24.576
-
-
-
-
5.5
-
70
-
-
0.7
+1
-1
V
V
MHz
V
V
mA
mA
DC ELECTRICAL CHARACTERISTICS (V DD = 5V, Ta = 25 , unless otherwise specified)
Characteristics
Symbol Condition
Min.
Typ.
Max.
Unit
High-level output voltage
V OH
V OL
I IN
C IN
R PU
I DD1
I DD2
I OH =100
I OL =500
V IN = 5V
-
V DD - 1.5
-
-
-
-
-
V
Low-level output voltage
-
V SS + 0.5
V
Input leakage current
Input pin capacitance
25
-
-
pF
25
Pull-Up resistance
-
-
30
-
mA
Operating current at V DD =5V
and f OSC =24.576MHz
Normal
-
100
150
Powered down
-
-
10
mA
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