SGHi300SVC(GH68-07822A).pdf

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MITs TELEPHONE
SGH-i300
MITs TELEPHONE
CONTENTS
1. Specification
2. Flow Chart of Troubleshooting
3. Exploded Views and Parts List
4. Electrical Parts List
5. PCB Diagrams
6. Block Diagrams
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1. SGH-i300 Specification
1-1. PDA specification
Parts Name
Description
Note
CPU
PXA272
Core : Xscale
Core Frequencies : 416 MHz
Clock : 13 MHz, 32,768 KHz
FLASH : 64M Byte
Memory
SRAM
IDT70P248L, DUAL PORT STATIC Memory, 8K/4K * 16
Bit
RAM
K4M56323PE, SDRAM, 4 Bank, 8M * 32 Bit
LCD
Resolution : 320 x 240 QVGA 1.98" 65K TFT Color
Auido CODEC
WM9713, Dual codec stereo audio
Melody
YMU765, 64 poly
External Card
T-FLASH Card
Camera
1/3.2" 1.3 Mega Pixels CMOS Image Sensor
JTAG
IEEE 1149.1 Portocol support, Flash Programming
Control
Hard disk
3G Hard disk driver
UART
RS-232C , USB 1.1
IrDA
HSDL 3003
Battery
Standard/Extend Capacitance : 1000/1700mA
Speaker
Impedance : 8 Ω , Size : 13 x 15 * 3.4t
Receiver
Impedance : 32 Ω ,Size:6x11*3t
Motor
RPM 10000, Size : Bartype 8 mm
KeyMatrix
5*7
1-1
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SGH-i300 Specification
1-2. Phone Specification
Parts Name
Description
Note
CPU
Trident EF version
Core : DSP16000/ARM7IDMI
DSP Core : RAM(20k * 16), ROM(144K * 16)
ARM CORE : RAM(4K * 32), ROM(2K * 32)
Clock : 13 MHz, 32,768 KHz
Memory
LRS1828
ROM:4M*16Bit*2
RAM:2M*16Bit
PMIC
Single-cell Li-lon Charger, SIU, LED Driver
Power-On/Off and reset control logic
8-bit ADC, Seven programmable low-drop-out regulators
1.8/3.0V SIM power supply and logic level translators
CODEC
Supports GSM 2+ new feature : multislotting( GPRS and
HSCSD)
ADC and DAC function for baseband and voice band
DAI(digital audio interface)
32.768 clock on-chip oscillator
GMSK modulator(88/144 bits)
RF Transceiver
Low-IF Receiver, Universal Baseband Interface
Offset-PLL Transmitter
Dual RF Synthesizer, GPRS Class 12 Compliant
3-Wire Serial Interface
Dual and Triple and Quad -Band Support(GSM850/E-
GSM900/DCS1800/PCS1900)
PAM
Complete Power Control Solution
Single 2.9V to 5.5V Supply Voltage
GSM, E-GSM and DCS/PCS
Products/GPRS Class 12 Compatible
+35dBm GSM Output Power at 3.5V/ +33dBm DCS/PCS Output
Power at 3.5V
FEM
GSM : 897.50 ± 17.5 MHz
DCS : 1747.50 ± 37.5 MHz
GSM : 1880.00 ± 30.0 MHz
JTAG
IEEE 1149.1 Protocol Support, Flash Programming Control
UART
RS-232C
1-2
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2. SGH-i300 Flow Chart of Troubleshooting
2-1. Power On
'Power on' does not work
Yes
Check the
current consumption
more than 20mA
No
Press nPower key or
hardware Reset
Yes
Check the
Pin 1 of U323 or
U302 is High
No
Charge the Battery
Yes
Check the
Pin 1 of U305 is High
No
Charge the Battery
Yes
Check the
Vbat more than 3.6V
No
Charge the Battery
Yes
Check the
Pin 4 of U301 is
more than 3.3V
No
Check the
Pin 8 of U 306 is High
Yes
Check the
Pin 5 of U307 is
more than 1.0V
No
Check the
Pin 1 of U 307 is High
Yes
Check the
Clock signal at
OSC101 and OSC102
No
Retry Hardware Reset
Yes
Check the initial operation
Yes
END
2-1
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SGH-i300 Flow Chart of Troubleshooting and Circuit Diagrams
VBAT
R304
VBAT
VBAT
VBAT
U306
PDA_PWR_KEEP
8
HOLE
PWR
1
AUTO_PWR
RTCALARM
R316
7
2
C317
C312
SW
DC
2S
3.0V
END_PWR
VBAT
BAT33
6
3
Q302
SENSE
FET
nPWR_SNS
1G
5
DEN
GND
4
3D
nALARM_SNS
R308
U301
5
1 IN
OUT
5
C347
C348
1
2 GND
R306
4
3
4
EN
REF_BYP
POWER_DET
2
C314
U304
C313
R307
3
C331
BAT33
VBAT
R311
R317
VBAT
C346
POWER_DET
U323
4
1
R302
R318
5
VCC
GND
NC
OUT
1
B
4
Y
3
2
nPOWER_FAIL
VDD
2 A
GND
U315
3
C330
R353
3.0V
VBAT
VCC_CPU
U302
1
IN
OUT
5
2
GND
SYS_EN
3
EN
REF_BYP
4
C307
C309
C308
2-2
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