74HC_HCT221_CNV_2.pdf

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT221

Dual non-retriggerable monostable

multivibrator with reset

Product speciﬁcation

Supersedes data of April 1988

File under Integrated Circuits, IC06

December 1990

Philips Semiconductors

Product speciﬁcation

Dual non-retriggerable monostable

multivibrator with reset

74HC/HCT221

FEATURES

jitter-free triggering from inputs with slow transition rates,

providing the circuit with excellent noise immunity.

Pulse width variance is typically less than ± 5%

Once triggered, the o utp uts (nQ, nQ) are independent of

further transitions of nA and nB inputs and are a function

of the timing components. The output pulses can be

te rm inated by the overriding active LOW reset inputs

(nR D ). Input pulses may be of any duration relative to the

output pulse.

Pin-out identical to “123”

Overriding reset terminates output pulse

nB inputs have hysteresis for improved noise immunity

Output capability: standard (except for nR EXT /C EXT )

I CC category: MSI

Pulse width stability is achieved through internal

compensation and is virtually independent of V CC and

temperature. In most applications pulse stability will only

be limited by the accuracy of the external timing

components.

The output pulse width is defined by the following

relationship:

GENERAL DESCRIPTION

The 74HC/HCT221 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT221 are dual non-retriggerable monostable

multivibrators. Each multi vi brator features an active

LOW-going edge input (nA) and an active HIGH-going

edge input (nB), either of which can be used as an enable

input.

t W =C EXT R EXT In 2

t W = 0.7C EXT R EXT

Pin assignments for the “221” are identical to those of the

“123” so that the “221” can be substituted for those

products in systems not using the retrigger by merely

changing the value of R EXT and/or C EXT .

Pulse triggering occurs at a particular voltage level and is

not directly related to the transition time of the input pulse.

Schmitt-trigger input circuitry for the nB inputs allow

QUICK REFERENCE DATA

GND = 0 V; T amb =25

C; t r =t f = 6 ns

TYPICAL

SYMBOL PARAMETER

CONDITIONS

UNIT

HCT

pro p agatio n d elay

C L = 15 pF; V CC =5 V;

R EXT =5 k

t PHL

n A , nB, n R D to nQ, n Q

; C EXT = 0 pF

t PLH

nA, nB, nR D to nQ, nQ

C I

input capacitance

3.5

C PD

power dissipation capacitance per package notes 1 and 2

Notes

1. C PD is used to determine the dynamic power dissipation (P D in

W):

P D =C PD ´

V CC 2

f i +å

(C L ´

V CC 2

f o )

0.33

C EXT ´

V CC 2

f o +

V CC where:

f o ) = sum of outputs

C EXT = timing capacitance in pF; C L = output load capacitance in pF

V CC = supply voltage in V; D = duty factor in %

2. For HC the condition is V I = GND to V CC

For HCT the condition is V I = GND to V CC -

f i = input frequency in MHz; f o = output frequency in MHz

(C L ´

V CC 2

1.5 V

December 1990

Philips Semiconductors

Product speciﬁcation

Dual non-retriggerable monostable

multivibrator with reset

74HC/HCT221

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information” .

PIN DESCRIPTION

PIN NO.

SYMBOL

NAME AND FUNCTION

1, 9

1A, 2A

trigger inputs (negative-edge triggered)

2, 10

1 B , 2B

trigger inputs (positive-edge triggered)

3, 11

1 R D , 2R D

direct reset inputs (active LOW)

4, 12

1Q, 2Q

outputs (active LOW)

2R EXT /C EXT

external resistor/capacitor connection

GND

ground (0 V)

13, 5

1Q, 2Q

outputs (active HIGH)

14, 6

1C EXT , 2C EXT

external capacitor connection

1R EXT /C EXT

external resistor/capacitor connection

V CC

positive supply voltage

Fig.1 Pin configuration.

Fig.2 Logic symbol.

Fig.3 IEC logic symbol.

December 1990

Philips Semiconductors

Product speciﬁcation

Dual non-retriggerable monostable

multivibrator with reset

74HC/HCT221

FUNCTION TABLE

INPUTS

OUTPUTS

nR D

L (2)

H (2)

L (2)

H (2)

(3)

Notes

1. H = HIGH voltage level

L = LOW voltage level

X = don’t care

= LOW-to-HIGH level

= HIGH-to-LOW level

= one HIGH-level output pulse

= one LOW-level output pulse

2. If the monostable was triggered before this condition

was established the pulse will continue as

programmed.

3. For this combination the reset input must be LOW and

the following sequence must be used:

pin 1 (or 9) must be set HIGH or pin 2 (or 10) set LOW;

then pin 1 (or 9) must be LOW and pin 2 (or 10) set

HIGH. Now the reset input goes from LOW-to-HIGH

and the device will be triggered.

Fig.4 Functional diagram.

December 1990

Philips Semiconductors

Product speciﬁcation

Dual non-retriggerable monostable

multivibrator with reset

74HC/HCT221

Fig.5 Logic diagram.

Note

It is recommended to ground pins 6 (2C EXT ) and 14 (1C EXT ) externally to pin 8 (GND).

Fig.6 Timing component connections.

December 1990

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