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Philips Semiconductors
Product specification
Avalanche energy rated
IRFP460
FEATURES
SYMBOL
QUICK REFERENCE DATA
• Repetitive Avalanche Rated
• Fast switching
d
V
DSS
= 500 V
• Stable off-state characteristics
• High thermal cycling performance
I
D
= 20 A
• Low thermal resistance
g
R
DS(ON)
£
0.27
W
s
GENERAL DESCRIPTION
PINNING
SOT429 (TO247)
N-channel, enhancement mode
PIN
DESCRIPTION
field-effect power transistor,
intended for use in off-line switched
1
gate
mode power supplies, T.V. and
computer monitor power supplies,
2
drain
d.c. to d.c. converters, motor control
circuits and general purpose
3
source
switching applications.
tab
drain
The IRFP460 is supplied in the
SOT429 (TO247) conventional
leaded package.
1
2 3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DSS
Drain-source voltage
T
j
= 25 ˚C to 150˚C
-
500
V
V
DGR
Drain-gate voltage
T
j
= 25 ˚C to 150˚C; R
GS
= 20 k
W
-
500
V
V
GS
Gate-source voltage
-
±
30
V
I
D
Continuous drain current
T
mb
= 25 ˚C; V
GS
= 10 V
-
20
A
T
mb
= 100 ˚C; V
GS
= 10 V
-
12.4
A
I
DM
Pulsed drain current
T
mb
= 25 ˚C
-
80
A
P
D
Total dissipation
T
mb
= 25 ˚C
-
250
W
T
j
, T
stg
Operating junction and
- 55
150
˚C
storage temperature range
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
E
AS
Non-repetitive avalanche
Unclamped inductive load, I
AS
= 20 A;
-
1300
mJ
energy
t
p
= 0.2 ms; T
j
prior to avalanche = 25˚C;
V
DD
£
50 V; R
GS
= 50
W
; V
GS
= 10 V
E
AR
Repetitive avalanche energy
1
I
AR
= 20 A; t
p
= 2.5
m
s; T
j
prior to
-
32
mJ
avalanche = 25˚C; R
GS
= 50
; V
GS
= 10 V
I
AS
, I
AR
Repetitive and non-repetitive
-
20
A
avalanche current
1
pulse width and repetition rate limited by T
j
max.
September 1999
1
Rev 1.000
PowerMOS transistors
W
Philips Semiconductors
Product specification
Avalanche energy rated
IRFP460
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction
-
-
0.5 K/W
to mounting base
R
th j-a
Thermal resistance junction SOT429 package, in free air
-
45
-
K/W
to ambient
ELECTRICAL CHARACTERISTICS
T
j
= 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown
V
GS
= 0 V; I
D
= 0.25 mA
500
-
-
V
voltage
D
V
(BR)DSS
/ Drain-source breakdown
V
DS
= V
GS
; I
D
= 0.25 mA
-
0.1
-
%/K
D
T
j
voltage temperature
coefficient
R
DS(ON)
Drain-source on resistance V
GS
= 10 V; I
D
= 10 A
-
0.2 0.27
W
V
GS(TO)
Gate threshold voltage
V
DS
= V
GS
; I
D
= 0.25 mA
2.0
3.0
4.0
V
g
fs
Forward transconductance
V
DS
= 30 V; I
D
= 10 A
13
18
-
S
I
DSS
Drain-source leakage current V
DS
= 500 V; V
GS
= 0 V
-
2
50
m
A
V
DS
= 400 V; V
GS
= 0 V; T
j
= 125 ˚C
-
100 1000
m
A
I
GSS
Gate-source leakage current V
GS
=
±
30 V; V
DS
= 0 V
-
10
200
nA
Q
g(tot)
Total gate charge
I
D
= 20 A; V
DD
= 400 V; V
GS
= 10 V
-
147 190
nC
Q
gs
Gate-source charge
-
12
18
nC
Q
gd
Gate-drain (Miller) charge
-
78
100
nC
t
d(on)
Turn-on delay time
V
DD
= 250 V; R
D
= 12
W
;
-
23
-
ns
t
r
Turn-on rise time
R
G
= 3.9
W
-
72
-
ns
t
d(off)
Turn-off delay time
-
150
-
ns
t
f
Turn-off fall time
-
75
-
ns
L
d
Internal drain inductance
Measured from tab to centre of die
-
3.5
-
nH
L
d
Internal drain inductance
Measured from drain lead to centre of die
-
4.5
-
nH
L
s
Internal source inductance
Measured from source lead to source
-
7.5
-
nH
bond pad
C
iss
Input capacitance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
-
3000
-
pF
C
oss
Output capacitance
-
480
-
pF
C
rss
Feedback capacitance
-
270
-
pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
T
j
= 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
I
S
Continuous source current
T
mb
= 25˚C
-
-
20
A
(body diode)
I
SM
Pulsed source current (body T
mb
= 25˚C
-
-
80
A
diode)
V
SD
Diode forward voltage
I
S
= 20 A; V
GS
= 0 V
-
-
1.5
V
t
rr
Reverse recovery time
I
S
= 20 A; V
GS
= 0 V; dI/dt = 100 A/
m
s
-
900
-
ns
Q
rr
Reverse recovery charge
-
15
-
m
C
September 1999
2
Rev 1.000
PowerMOS transistors
Philips Semiconductors
Product specification
Avalanche energy rated
IRFP460
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
Zth j-mb (K/W)
PHW20N50E
1
D = 0.5
0.1
0.2
0.1
0.05
0.02
P
tp
D = tp/T
0.01
single pulse
T
0.001
0
20
40
60
80
100 120 140
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
Pulse width, tp (s)
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100
×
P
D
/P
D 25 ˚C
= f(T
mb
)
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
120
110
100
90
80
70
60
50
40
30
20
10
0
ID%
Normalised Current Derating
Drain Current, ID (A)
PHW20N50E
20
Tj = 25 C
VGS = 10 V
18
16
8 V
14
12
5 V
10
4.8 V
8
4.6 V
6
4.4 V
4
4.2 V
2
4 V
0
0
20
40
60
80
100 120 140
0
1
2
3
4
5
Tmb / C
Drain-Source Voltage, VDS (V)
Fig.2. Normalised continuous drain current.
ID% = 100
×
I
D
/I
D 25 ˚C
= f(T
mb
); conditions: V
GS
³
10 V
Fig.5. Typical output characteristics.
I
D
= f(V
DS
); parameter V
GS
Drain-Source On Resistance, RDS(on) (Ohms)
PHW20N50E
Peak Pulsed Drain Current, IDM (A)
PHW20N50E
0.5
4V 4.2V
4.6 V
Tj = 25 C
100
4.8V
5V
tp = 10 us
4.4 V
0.45
10
100us
0.4
1 ms
0.35
RDS(on) = VDS/ ID
10 ms
d.c.
1
0.3
100 ms
VGS = 6 V
0.25
10V
0.1
0.2
10
100
1000
0 2 4 6 8 024680
Drain Current, ID (A)
Drain-Source Voltage, VDS (V)
Fig.3. Safe operating area. T
mb
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.6. Typical on-state resistance.
R
DS(ON)
= f(I
D
); parameter V
GS
September 1999
3
Rev 1.000
PowerMOS transistors
Philips Semiconductors
Product specification
Avalanche energy rated
IRFP460
VGS(TO) / V
Drain current, ID (A)
PHW20N50E
30
max.
VDS > ID X RDS(ON)
4
25
typ.
20
3
15
min.
150 C
Tj = 25 C
2
10
5
1
0
0
1
2
3
4
5
6
7
8
0
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
); parameter T
j
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 0.25 mA; V
DS
= V
GS
ID / A
SUB-THRESHOLD CONDUCTION
1E-01
Transconductance, gfs (S)
VDS > ID X RDS(ON)
PHW20N50E
20
18
Tj = 25 C
1E-02
16
14
1
50 C
2 %
typ
98 %
12
1E-03
10
8
1E-04
6
4
1E-05
2
0
0
5
10
15
20
25
30
1E-06
0
1
2
3
4
Drain current, ID (A)
VGS / V
Fig.8. Typical transconductance.
g
fs
= f(I
D
); parameter T
j
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
a
Normalised RDS(ON) = f(Tj)
Capacitances, Ciss, Coss, Crss (pF)
PHW20N50E
10000
2
Ciss
1
1000
Coss
Crss
0
100
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
0.1
1
10
100
Drain-Source Voltage, VDS (V)
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 10 A; V
GS
= 10 V
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
September 1999
4
Rev 1.000
PowerMOS transistors
Philips Semiconductors
Product specification
Avalanche energy rated
IRFP460
Source-Drain Diode Current, IF (A)
PHW20N50
E
Gate-source voltage, VGS (V)
ID = 20A
Tj = 25 C
PHW20N50E
50
15
VGS = 0 V
45
14
1
13
40
300V
11
35
10
200V
30
8
25
VDD = 400 V
150 C
Tj = 25 C
20
6
5
15
3
10
2
5
0
0
0
25
50
75
100
125
150
175
200
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Drain-Source Voltage, VSDS (V)
Gate charge, QG (nC)
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); parameter V
DS
Fig.16. Source-Drain diode characteristic.
I
F
= f(V
SDS
); parameter T
j
Switching times, td(on), tr, td(off), tf (ns)
PHW20N50E
Non-repetitive Avalanche current, IAS (A)
600
100
td(off)
500
400
Tj prior to avalanche = 25 C
300
10
tr, tf
VDS
125 C
200
tp
100
td(on)
ID
PHW20N50E
0
1
0
5
10
15
20
25
30
1E-06
1E-05
1E-04
1E-03
1E-02
Gate resistance, RG (Ohms)
Avalanche time, tp (s)
Fig.14. Typical switching times; t
d(on)
, t
r
, t
d(off)
, t
f
= f(R
G
)
Fig.17. Maximum permissible non-repetitive
avalanche current (I
AS
) versus avalanche time (t
p
);
unclamped inductive load
1.15
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
100
Maximum Repetitive Avalanche Current, IAR (A)
1.1
1.05
10
Tj prior to avalanche = 25 C
1
125 C
0.95
1
0.9
PHW20N50E
0.1
0.85
1E-06
1E-05
1E-04
1E-03
1E-02
-100
-50
0
50
100
150
Avalanche time, tp (s)
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage;
V
(BR)DSS
/V
(BR)DSS 25 ˚C
= f(T
j
)
Fig.18. Maximum permissible repetitive avalanche
current (I
AR
) versus avalanche time (t
p
)
September 1999
5
Rev 1.000
PowerMOS transistors
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