TDA8415.PDF

INTEGRATED CIRCUITS

DATA SHEET

TDA8415

TV and VTR stereo/dual sound

processor with integrated filters and

I 2 C-bus control

Preliminary speciﬁcation

File under Integrated Circuits, IC02

May 1989

Philips Semiconductors

Preliminary speciﬁcation

TV and VTR stereo/dual sound processor with

integrated ﬁlters and I 2 C-bus control

TDA8415

GENERAL DESCRIPTION

Features

The TDA8415 is a processor of stereo/dual language

signals (B/G-standard) for stereo sound television

receivers and VTRs, using the switched-capacitor

technique. The AF signals at the TDA8415 inputs must be

“(L

Use of the switched-capacitor technique for signal

processing

Small amount of peripheral components

R)/2” or “language A” on one channel and “R” or

“language B” on the second channel (where L = left and

R = right). The carrier frequency of the second channel is

also modulated by an identification signal (stereo or dual

sound). The device is controlled by a microcomputer via

the two-line, bidirectional I 2 C-bus.

Integrated anti-aliasing filters

Low distortion AF signal handling

Integrated de-emphasis with a time constant of 50

Function and software are compatible with the TDA8405

Two general purpose output ports

Full ESD protection

QUICK REFERENCE DATA

PARAMETER

CONDITION

SYMBOL

MIN.

TYP.

MAX.

UNIT

Supply voltage (pin 15)

V P

Supply current (pin 15)

I P

AF output signal (RMS value)

(pins 11 to 14)

V o

Weighted signal-to-noise

ratio of the AF output

signals (CCIR 468/3)

W)/W

Crosstalk attenuation

stereo mode at

f = 1 kHz

a S

dual sound mode at

f = 40 Hz to 12.5 kHz

a DS

Pilot signal input sensitivity

V i

2.5

Total harmonic distortion

THD

0.1

PACKAGE OUTLINE

20-lead DIL; plastic (SOT146);SOT146-1; 1996 December 18.

May 1989

Philips Semiconductors

Preliminary speciﬁcation

TV and VTR stereo/dual sound processor

with integrated ﬁlters and I 2 C-bus control

TDA8415

May 1989

Philips Semiconductors

Preliminary speciﬁcation

TV and VTR stereo/dual sound processor

with integrated ﬁlters and I 2 C-bus control

TDA8415

Fig.2 Input and output loading diagram.

May 1989

Philips Semiconductors

Preliminary speciﬁcation

TV and VTR stereo/dual sound processor

with integrated ﬁlters and I 2 C-bus control

TDA8415

PINNING

Control port C1

Output A4 AF 2 output

SDA, serial data line (I 2 C-bus)

Output A3 AF 2 output

SCL, serial clock line (I 2 C-bus)

Output A2 AF 1 output

Oscillator input (or quartz)

Output A1 AF 1 output

Digital ground (0 V)

Supply voltage V P

Not connected, but reserved

Analogue ground (0 V)

Sound channel input AF2 (E2)

Ripple rejection improvement

Sound channel input AF1 (E1)

Mute input

External AF input (E4)

Control port C2

External AF input (E3)

Not connected, but reserved

FUNCTIONAL DESCRIPTION

Anti-aliasing ﬁlters

Frequency band limitation is performed by a second order Sallen and Key low-pass filter inserted in the AF signal path

and the identification circuit. This limitation is necessary because of the time-discrete signal processing needed to meet

the Nyquist criterion.

Identiﬁcation

To enable the identification of the transmitted AF signal (mono, stereo or dual sound), the carrier frequency of the second

channel (E2) is also modulated by an identification signal. The identification signal is a 54.6875 kHz pilot carrier signal

which is 50% amplitude modulated by either a 117.4 Hz signal for stereo transmission or by a 274.1 Hz signal for dual

sound transmission.

The identification section of the circuit consists of a 54 kHz high-pass filter followed by a gain controlled amplifier with an

AM demodulator. The total gain of the high-pass filter and the amplifier is approximately 56 dB. The demodulated

identification signal is filtered by the identification band-pass filters, (117.4 Hz for stereo transmission, 274.1 Hz for dual

sound transmission). The output from either filter is converted to a DC signal by a peak detector and the necessary

hysteresis is performed by a Schmitt-trigger. The resultant DC output signals indicate the status of the transmitter (mono,

stereo or dual sound).

De-matrix and de-emphasis

Depending on the results of the identification circuit (mono, stereo or dual sound) the AF signals at the inputs E1 and E2

are converted to the signals at E1* and E2* as listed in Table 1.

Table 1 Transmitter status

TRANSMITTER STATUS (1)

E1*

E2*

mono

0.7(L+R)

2(L+R)

stereo

0.7(L+R)

dual sound

0.7A

Note

1. Where L = left channel signal; R = right channel signal; A = first sound channel signal and B = second sound channel

signal.

This section of the circuit also performs the de-emphasis (50 m s time constant) with a high degree of accuracy.

May 1989

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika: