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LOW-NOISE TV VERTICAL DEFLECTION SYSTEM
TDA1170N
LOW-NOISE TV VERTICAL DEFLECTION SYSTEM
.
COMPLETE VERTICAL DEFLECTION
SYSTEM
.
SUITABLE FOR HIGH DEFINITION
MONITORS
DESCRIPTION
The TDA1170N is a monolithic integrated circuit in
a 12-lead quad in-line plastic package. It is in-
tended for use in black and white and colour TV
receivers. Low-noise makes this device particularly
suitable for use in monitors. The functions incorpo-
rated are : synchronization circuit, oscillator and
ramp generator, high power gain amplifier, flyback
generator, voltage regulator.
FINDIP12
(Plastic Package)
ORDER CODE :
TDA1170N
PIN CONNECTIONS
RAMP OUTPUT
1
12
RAMP GENERATOR
SUPPLY VOLTAGE
2
11
COMPENSATION
FLYBACK
3
10
AMP. INPUT
GROUND
GROUND
POWER AMPLIFLIER OUTPUT
POWER AMPLIFLIER
SUPPLY VOLTAGE
4
9
OSCILLATOR
5
8
SYNC. INPUT
REGULATED
VOLTAGE
6
7
HEIGHT ADJUSTMENT
December 1992
1/8
.
LOW NOISE
TDA1170N
BLOCK DIAGRAM
+V
S
C
4
D
A
FREQ
6
2
3
5
P
1
TDA1170N
R
H
C
9
9
OSCILLATOR
VOLTAGE
REGULATOR
FLYBACK
GENERATOR
POWER
AMPLIFLIER
4
C
1
R
G
YOKE
C
8
SYNC
8
SYNC
CIRCUIT
RAMP
GENERATOR
BUFFER
STAGE
PREAMPLIFLIER
11
C
5
C
7
7
12
1
10
R
E
TABS
LINEARITY
R
D
C
2
P
2
R
A
P
3
R
B
R
C
HEIGHT
C
3
C
6
R
F
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
S
Supply Voltage at Pin 2
35
V
V
4
,V
5
Flyback Peak Voltage
60
V
V
10
Power Amplifier Input Voltage
+ 10
– 0.5
V
V
I
o
Output Peak Current (non repetitive) at t = 2msec
2
A
I
o
Output Peak Current at f = 50Hz t
3
10
m
sec
2.5
A
I
o
Output Peak Current at f = 50Hz t > 10
m
sec
1.5
A
I
3
Pin 3 DC Current at V
4
<V
2
100
mA
I
3
Pin 3 Peak to Peak Flyback Current for f = 50Hz, t
fly
3
1.5msec
1.8
A
I
8
Pin 8 Current
±
20
mA
P
tot
Power Dissipation : at T
ab
=90
C
at T
amb
=80
°
5
1
W
W
°
C (free air)
T
stg
,T
j
Storage and Junction Temperature
– 40, +150
°
C
THERMAL DATA
Symbol
Parameter
Value
Unit
R
th j-tab
R
th j-amb
Thermal Resistance Junction-tab
Thermal Resistance Junction-ambient
Max
Max
12
70
°
°
C/W *
* Obtained with tabs soldered to printed circuit with minimized copper area.
2/8
C/W
TDA1170N
ELECTRICAL CHARACTERISTICS
(Refer to the test circuits, V
S
=35 V,T
amb
=25
o
C,unless otherwise specified)
DC CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit Fig.
I
2
Pin 2 Quiescent Current
I
3
=0
7
14
mA
1b
I
5
Pin 5 Quiescent Current
I
4
=0
8
17
mA
1b
–I
9
Oscillator Bias Current
V
9
= 1V
0.1
1
m
Aa
–I
10
Amplifier Input Bias Current
V
10
=1V
1
10
m
Ab
–I
12
Ramp Generator Bias Current
V
12
= 0
0.02 0.3
m
Aa
–I
12
Ramp Generator Current
I
7
=20
m
A, V
12
= 0
18.5
20
21.5
m
Ab
I
12
I
12
Ramp Generator Non-linearity
D
V12 = 0 to 12V, I
7
=20
m
A
0.2
1
%
1b
V
s
Supply Voltage Range
10
35
V
V
1
Pin 1 Saturation Voltage to Ground
I
1
= 1mA
1
1.4
V
V
3
Pin 3 Saturation Voltage to Ground
I
3
= 10mA
300
450
mV
1a
V
4
Qiuescent output Voltage
V
S
= 10V
R1 = 1k
4.1
4.4
4.75
V
1a
W
,R2=1k
W
V
S
= 35V
R1 = 3k
8.3
8.8
9.45
V
1a
W
,R2=1k
W
V
4L
Output Saturation Voltage to Ground – I
4
= 0.1A
–I
4
= 0.8A
0.9
1.9
1.2
2.3
V
V
1c
1c
V
4H
Output Saturation Voltage to Supply I
4
= 0.1A
I
4
= 0.8A
1.4
2.8
2.1
3.2
V
V
1d
1d
V
6
Regulated Voltage at Pin 6
6.1
6.5
6.9
V
1b
V
7
Regulated Voltage at Pin 7
I
7
=20
m
A
6.2
6.6
7
V
1b
D
V
6
|
;
D
V
7
Regulated Voltage Drift with Supply
Voltage
D
V
S
= 10 to 35V
1
mV/V 1b
D
V
S
D
V
S
V
10
Amplifier Input Reference Voltage
2.07 2.2
2.3
V
R8
Pin 8 Input Resistance
V
8
3
0.4V
1
M
W
1a
3/8
|
TDA1170N
Figure 1 :
DC Test Circuits
Figure 1a
Figure 1b
I2
+Vs
V3
I3
+Vs
I5
2
5
3
2
5
8
TDA1170N
4
9
TDA1170N
10
9
I8
TABS
R1
TABS
7
12
10
6
12
7
1k
W
-I9
- I12
V4
R2
V6
- I12
V7
- I10
1V
1V
8V
100k
1V
Figure 1c
Figure 1d
+Vs
+Vs
2
5
I4
2
5
V4H
9
TDA1170N
4
9
TDA1170N
4
TABS
TABS
10
10
4V
V4L
1V
I4
4/8
W
TDA1170N
ELECTRICAL CHARACTERISTICS
(Refer to the AC test circuit, V
S
= 22V ; f = 50Hz ; T
amb
=25
°
C, unless otherwise specified)
AC CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
I
s
Supply Current
I
y
= 1App
140
mA
I
8
Sync. Input Current (positive or negative)
500
m
A
V4
Flyback Voltage
I
y
= 1App
45
V
t
fly
Flyback Time
I
y
= 1App
0.7
ms
V
ON
Peak to Peak Output Noise
Pin 9 Connected to GND
40
mV
PP
f
o
Free Running Frequency
(P1 + R1) = 300k
W
, C2 = 0.1
m
F
42.2
48.5
Hz
Hz
(P1 + R1) = 260k
W
, C2 = 0.1
m
F
D
f
Sychronization Range
I
8
= 0.5mA
14
Hz
D
f
Frequency Drift with Supply Voltage
V
s
= 10 to 35V
0.005
Hz/V
D
V
S
|
D
f|
Frequency Drift with tab Temperature
T
tab
= 40 to 120
°
C
0.01
Hz/
°
C
D
T
ab
Figure 2 :
AC Test and Application Circuit for Large Screen B/W TV Set 10
W
/20mH/1App
V = 2.2V
S
1N4001
470
m
F
TABS
0.1
m
F
100
m
5
2
0.1
m
F
3.3
W
3
4
T
D
A
1
1
7
0
N
220k
W
100pF
11
5.6k
W
W
Ly = 20mH
Sync.
Input
470pF
8
5.6k
W
10
22k
W
m
1000
F
9
1
100k
W
P1
6
7
R1
47k
W
1.8k
W
100k
W
0.1
m
0.1
m
C2
0.1
m
F
120k
W
910k
W
1
W
5/8
F
YOKE
Ry = 10
m
F
F
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