4034.pdf

HCC/HCF4034B

8-STAGE STATIC BIDIRECTIONAL PARALLEL/SERIAL

INPUT/OUTPUT BUS REGISTER

. BIDIRECTIONAL PARALLEL DATA INPUT

. ASYNCHRONOUS OR SYNCHRONOUS PAR-

ALLEL DATA LOADING

OUTPUTS

. PARALLEL DATA-INPUT ENABLE ON ”A”

. DATA RECIRCULATION FOR REGISTER EX-

PANSION

DATA LINES (3-state output)

(Plastic Package)

(Ceramic Frit Seal Package)

. MULTIPACKAGE REGISTER EXPANSION

. FULLY STATIC OPERATIONAL DC-TO-5MHz

. QUIESCENT CURRENT SPECIFIED TO 20V

FOR HCC DEVICE

(typ.) AT V DD = 10V

. 5V, 10V, AND 15V PARAMETRIC RATINGS

. INPUT CURRENT OF 100nA AT 18V AND 25 ° C

FOR HCC DEVICE

(Micro Package)

ORDER CODES :

HCC4034BF

. 100% TESTED FOR QUIESCENT CURRENT

. MEETS ALL REQUIREMENTS OF JEDEC TEN-

HCF4034BEY

HCF4034BM1

13A, ”STANDARD SPE-

CIFICATIONS FOR DESCRIPTION OF ”B”

SERIES CMOS DEVICES”

PIN CONNECTIONS

DESCRIPTION

The HCC4034B (extended temperature range) and

HCF4034B (intermediate temperature range) are

monolithic integrated circuits, available in 24-lead

dual in-line plastic or ceramic package and plastic

micro package. The HCC/HCF4034B is a static

eight-stage parallel-or serial-input parallel-output

parallel information between two buses ; 2) convert

serial data to parallel form and direct the parallel

data to either of two buses ; 3) store (recirculate) par-

allel data, or 4) accept parallel data from either of two

buses and convert that data to serial form. Inputs

that control the operations include a single-phase

CLOCK (CL), A DATA ENABLE (AE), ASYN-

CHRONOUS/SYNCHRONOUS (A/S), A-BUS-TO-

B-BUS/B-BUS-TO-A-BUS (A/B), and PARALLEL/

SERIAL (P/S). Data inputs include 16 bidirectional

parallel data lines of which the eight A data lines are

inputs (3-state outputs) and the B data lines are out-

puts (inputs) depending on the signal level on the

A/B input. In addition, an input for SERIAL DATA is

also provided. All register stages are D-type master-

slave flip-flops with separate master and slave clock

June 1989

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. PARALLEL OR SERIAL INPUTS/PARALLEL

TATIVE STANDARD N

HCC/HCF4034B

inputs generated internally to allow synchronous or

asynchronous data transfer from master to slave.

Isolation from external noise and the effects of load-

ing is provided by output buffering.

PARALLEL OPERATION – A high P/S input signal

allows data transfer into the register via the parallel

data lines synchronously with the positive transition

of the clock provided the A/S input is low. If the A/S

input is high the transfer is independent of the clock.

The direction of data flow is controlled by the A/B

input. When this signal is high the A data lines are

inputs (and B data lines are outputs) ; a low A/B sig-

nal reverses the direction of data flow. The AE-input

is an additional feature which allows many registers

to feed data to a common bus. The A DATA lines are

enabled only when this signal is high. Data storage

through recirculation of data in each register stage

is accomplished by making the A/B signal high and

the AE signal low.

SERIALOPERATION – A low P/S signal allows ser-

ial data to transfer into the register synchronously

with the positive transition of the clock. The A/S input

is internally disabled when the register is in the serial

mode (asynchronous serial operation is not

allowed). The serial data appears as output data on

either the B lines (when A/B is high) or the A lines

(when A/B is low and the AE signal is high). Register

expansion can be accomplished by simply cascad-

ing HCC/HCF4034B packages.

FUNCTIONAL DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V DD *

Supply Voltage : HCC Types

HCF Types

– 0.5 to + 20

– 0.5 to + 18

V i

Input Voltage

– 0.5 to V DD + 0.5

I I

DC Input Current (any one input)

P tot

Total Power Dissipation (per package)

Dissipation per Output Transistor

for T op = Full Package-temperature Range

200

100

T op

Operating Temperature : HCC Types

HCF Types

– 55 to + 125

–40to+85

Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or any other conditions above those indicated in the operational sec-

tions of this specifi cation is not implied. Exposure to absolute maximum rating conditions for external periods may affect device

reliability.

Storage Temperature

– 65 to + 150

2/16

T stg

HCC/HCF4034B

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Value

Unit

V DD

Supply Voltage : HCC Types

HCF Types

3to18

3to15

V I

Input Voltage

0 to V DD

T op

Operating Temperature : HCC Types

HCF Types

– 55 to + 125

–40to+85

LOGIC DIAGRAMS

STEERING LOGIC

3/16

HCC/HCF4034B

LOGIC DIAGRAM AND TRUTH TABLE

INPUTS

OUT

CL M s CL S s

•

= INVALID CONDI-

FOR REGISTER INPUT-LEVELS AND RESULTING REGISTER OPERATION

”A”

Enable

P/S

A/B

A/S

Operation*

0 0 0 X Serial Mode ; Synch. Serial Data Input, ”A” Parallel Data Outputs Disabled

0 0 1 X Serial Mode ; Synch. Serial Data Input, ”B” Parallel Data Output

0 1 0 0 Parallel Mode ; ”B” Synch. Parallel Data Inputs, ”A” Parallel Data Outputs

Disabled

0 1 0 1 Parallel Mode ; ”B” Asynch. Parallel Data Inputs, ”A” Parallel Data Outputs

Disabled

0 1 1 0 Parallel Mode ; ”A” Parallel Data Inputs Disabled, ”B” Parallel Data Outputs,

Synch. Data Recirculation

0 1 1 1 Parallel Mode ; ”A” Parallel Data Inputs Disabled, ”B” Parallel Data Outputs,

Asynch. Data Recirculation

1 0 0 X Serial Mode ; Synch. Serial Data Input, ”A” Parallel Data Output

1 0 1 X Serial Mode ; Synch. Serial Data Input, ”B” Parallel Data Output

1 1 0 0 Parallel Mode ; ”B” Synch. Parallel Data Input, ”A” Parallel Data Output

1 1 0 1 Parallel Mode ; ”B” Asynch. Parallel Data Input, ”A” Parallel Data Output

1 1 1 0 Parallel Mode ; ”A” Synch. Parallel Data Input, ”B” Parallel Data Output

1 1 1 1 Parallel Mode ; ”A” Asynch. Parallel Data Input, ”B” Parallel Data Outpu

* Outputs change at positive transition of clock in the serial mode and when the A/S control inputs is ”low” in the parallel

mode.

4/16

•

= LEVEL CHANGE

HCC/HCF4034B

TIMING DIAGRAM

5/16

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