Ir2111 High Voltage - High Speed Power Mosfet And Igbt Driver.pdf
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Preliminary Data Sheet No. PD60028J
IR2111
HALF-BRIDGE DRIVER
Product Summary
Features
·
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
V
OFFSET
600V max.
I
O
+/-
200 mA / 420 mA
·
Gate drive supply range from 10 to 20V
V
OUT
10 - 20V
·
Undervoltage lockout for both channels
·
CMOS Schmitt-triggered inputs with pull-down
t
on/off
(typ.)
850 & 150 ns
·
Matched propagation delay for both channels
·
Deadtime (typ.)
700 ns
Internally set deadtime
·
High side output in phase with input
Packages
Description
The IR2111 is a high voltage, high speed power
MOSFET and IGBT driver with dependent high and
low side referenced output channels designed for
half-bridge applications. Proprietary HVIC and
latch immune CMOS technologies enable rugge-
dized monolithic construction. Logic input is
compatible with standard CMOS outputs. The out-
put drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction.
Internal deadtime is provided to avoid shoot-
through in the output half-bridge. The floating
channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration
which operates up to 600 volts.
8 Lead PDIP
8 Lead SOIC
Typical Connection
up to 600V
V
CC
V
CC
V
B
IN
HO
IN
COM
V
S
TO
LOAD
LO
IR2111
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in figures 7 through 10.
Symbol Definition
Min.
Max.
Units
V
B
High side floating supply voltage
-0.3
625
V
S
High side floating supply offset voltage
V
B
- 25
V
B
+ 0.3
V
HO
High side floating output voltage
V
S
- 0.3
V
B
+ 0.3
V
V
CC
Low side and logic fixed supply voltage
-0.3
25
V
LO
Low side output voltage
-0.3
V
CC
+ 0.3
V
IN
Logic input voltage
-0.3
V
CC
+ 0.3
dV
s
/dt
Allowable offset supply voltage transient (figure 2)
—
50
V/ns
P
D
Package power dissipation @ T
A
£
+25°C
(8 Lead DIP)
—
1.0
W
(8 lead SOIC)
—
0.625
Rth
JA
Thermal resistance, junction to ambient
(8 lead DIP)
—
125
°C/W
(8 lead SOIC)
—
200
T
J
Junction temperature
—
150
°C
T
S
Storage temperature
-55
150
T
L
Lead temperature (soldering, 10 seconds)
—
300
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol Definition
Min.
Max.
Units
V
B
High side floating supply absolute voltage
V
S
+ 10
V
S
+ 20
V
S
High side floating supply offset voltage
Note 1
600
V
HO
High side floating output voltage
V
S
V
B
V
V
CC
Low side and logic fixed supply voltage
10
20
V
LO
Low side output voltage
0
V
CC
V
IN
Logic input voltage
0
V
CC
°C
T
A
Ambient temperature
-40
125
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
.
2
IR2111
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in figure 3.
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
t
on
Turn-on propagation delay
—
850
1,000
V
S
= 0V
t
off
Turn-off propagation delay
—
150
180
V
S
= 600V
t
r
Turn-on rise time
—
80
130
ns
t
f
Turn-off fall time
—
40
65
DT
Deadtime, LS turn-off to HS turn-on &
—
700
900
HS turn-off to LS turn-on
MT
Delay matching, HS & LS turn-on/off
—
30
—
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
Definition
Min.
Typ.
Max. Units Test Conditions
V
IH
Logic “1” input voltage for HO & logic “0” for LO
6.4
—
—
V
CC
= 10V
9.5
—
—
V
CC
= 15V
12.6
—
—
V
CC
= 20V
V
V
IL
Logic “0” input voltage for HO & logic “1” for LO
—
—
3.8
V
CC
= 10V
—
—
6.0
V
CC
= 15V
—
—
8.3
V
CC
= 20V
V
OH
High level output voltage, V
BIAS
- V
O
—
—
100
I
O
= 0A
mV
V
OL
Low level output voltage, V
O
—
—
100
I
O
= 0A
I
LK
Offset supply leakage current
—
—
50
V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
supply current
—
50
100
V
IN
= 0V or V
CC
I
QCC
Quiescent V
CC
supply current
—
70
180
V
IN
= 0V or V
CC
µA
I
IN+
Logic “1” input bias current
—
20
40
V
IN
= V
CC
I
IN-
Logic “0” input bias current
—
—
1.0
V
IN
= 0V
V
BSUV+
V
BS
supply undervoltage positive going threshold
7.3
8.4
9.5
V
BSUV-
V
BS
supply undervoltage negative going threshold
7.0
8.1
9.2
V
V
CCUV+
V
CC
supply undervoltage positive going threshold
7.6
8.6
9.6
V
CCUV-
V
CC
supply undervoltage negative going threshold
7.2
8.2
9.2
I
O+
Output high short circuit pulsed current
200
250
—
V
O
= 0V, V
IN
= V
CC
PW
£
10 µs
mA
I
O-
Output low short circuit pulsed current
420
500
—
V
O
= 15V, V
IN
= 0V
PW
£
10 µs
3
IR2111
Functional Block Diagram
V
B
UV
DETECT
R
Q
HV
LEVEL
SHIFT
R
HO
PULSE
FILTER
DEAD
TIME
S
PULSE
GEN
V
S
UV
DETECT
IN
V
CC
LO
DEAD
TIME
COM
Lead Definitions
Symbol
Description
IN
Logic input for high side and low side gate driver outputs (HO & LO), in phase with HO
High side floating supply
V
B
HO
High side gate drive output
High side floating supply return
V
S
Low side and logic fixed supply
V
CC
LO
Low side gate drive output
COM
Low side return
Lead Assignments
8 Lead DIP
8 Lead SOIC
IR2111
IR2111S
Part Number
4
IR2111
IN
HO
LO
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
IN
(LO)
50%
50%
IN
(HO)
t
on
t
off
t
f
t
r
90%
90%
LO
HO
10%
10%
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
IN
(LO)
50%
50%
50%
50%
IN
IN
(HO)
LO
HO
90%
10%
HO
10%
MT
MT
DT
LO
90%
90%
LO
HO
10%
Figure 5. Deadtime Waveform Definitions
Figure 6. Delay Matching Waveform Definitions
5
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