6451247.pdf

design ideas

EditEd By CharlEs h small

and Fran GranvillE

readerS SolVe deSIGN ProBleMS

The Power Integrations Top-

switch family (www.powerint.

com/topgxproduct.htm) of integrated

flyback-regulator ICs provides excep-

tional performance in small, low-pin-

count packages. For the lowest-pin-

count packages, the multifunction, or

M, pin serves multiple purposes, in-

cluding on/off control and undervolt-

age- and overvoltage-input detection.

Other package types include an L pin,

which also provides this function.

The application notes and data sheets

show how to implement the various

features available at these pins. For

example, to allow remote on/off con-

trol and still preserve undervoltage

and overvoltage functions, the appli-

cation drawings show an NPN tran-

sistor, Q R , which connects between

the M or L pin and the Control pin

( Figure 1 ). To turn off the regulator,

Q R must be biased on. To achieve this

goal requires a base voltage of 2.6V dc

or greater.

The circuit in Figure 2 provides a

new feature that allows you to switch

the regulator on or off using a grounded

switch that is sometimes more conve-

nient to implement than a switch that

references to the Control pin. In the

case of a mechanical switch, this cir-

cuit would require no external power

to implement this function. This fea-

ture is important in applications in

which the Topswitch power supply is

the only source of power. This circuit

does not disturb the functioning of the

undervoltage and overvoltage func-

tions of the M or L pin. To understand

the functioning of the circuit in Figure

2 requires an explanation of the inter-

D Is Inside

74 RC lowpass filter expands

microcomputer’s output port

76 Simple dual constant-current

load tests low-current power

supplies

78 Stepper-motor motion control-

ler and driver fit into a CPLD/

FPGA

E What are your design problems

and solutions? Publish them here

and receive $150! Send your

Design Ideas to edndesignideas@

reedbusiness.com.

nal workings of the M or L pin. This

pin acts as a constant voltage source at

approximately 2V dc and sinks current

from the external circuit, which R LS

supplies. The internal current-sense

thresholds for undervoltage and over-

voltage detection are roughly 50 mA

�

R LS

47k

ON/OFF

Q R

150k

4 � A

DC-

INPUT

VOLTAGE

I B

Q 1

2N3906

DC-INPUT

VOLTAGE

M OR L

CONTROL

M OR L

CONTROL

OPTIONAL

�

OFF

S 1

NOTE: Q R CAN BE AN OPTOCOUPLER OUTPUT

OR A MANUAL SWITCH.

Figure 1 Adding transistor Q R to the

L pin of a Topswitch switching power

controller enables an on/off-control

feature.

�

Figure 2 Instead of using just the external transistor to switch a Topswitch on

or off, a simple on/off switch provides manual on/off control.

june 21, 2007 | EDN 73

Add a grounded-switch feature

for Topswitch on/off control

robert n Buono, aeolian audio llC, Bloomfield, nJ

design ideas

with 30 mA of hysteresis for undervolt-

age and 225 mA for overvoltage. That

is, when the current into the M or L

pin is less than 20 mA, or 50230 mA,

the regulator output switches off be-

cause of undervoltage. When the cur-

rent into the M or L pin exceeds 225

mA, the regulator output switches off

because of overvoltage. When the cur-

rent into the M or L pin is 50 to 225

mA, the output is enabled.

The circuit of Figure 2 works as fol-

lows: When the switch in the collec-

tor lead of Q 1 is open, Q 1 functions as

a simple diode with a 0.6V drop from

emitter to base. All the current that

R LS supplies flows into the M or L pin

through the base-emitter junction of

Q 1 and the 150-kV resistor. In this

mode, the Topswitch IC senses the un-

dervoltage and overvoltage thresholds.

However, when the switch to ground

closes, Q 1 functions as a nonsaturated

transistor with high gain. The circuit

siphons off most of the current through

R LS to ground as the collector current

of Q 1 . Only a small base current from

Q 1 plus 4 mA through the 150-kV re-

sistor flows into the M or L pin. For

the values in Figure 2 , this base cur-

rent is less than 3.8 mA, even when Q 1

has minimum gain and input voltage

is at a maximum of 450V dc. There-

fore, 3.814 mA, or 7.8 mA, flows into

the M or L pin. This low current flow-

ing into the pin “fools” the regulator

into “thinking” that the input voltage

is undervoltage, and the regulator out-

put switches off.

If another voltage or current source

is present, you could replace S 1 with an

open-collector switch that sinks cur-

rent only. If the remote on/off driver

can source and sink current, as the out-

put of a logic gate can, then you should

insert a diode in the collector lead of

Q 1 , and the driver must drive the cath-

ode of that diode above 2V dc to turn

off the regulator (optional in Figure

2 ). The M pin also allows current-lim-

it-threshold adjustment. EDN

RC lowpass

filter expands

microcomputer’s

output port

rex niven, Forty trout Electronics,

Eltham, victoria, australia

listing 1 whip-routine output function

It’s almost a corollary to Moore’s

Law: Next year, microcomput-

ers will have more features, and the

software team will have bigger ideas.

Unfortunately, though, the number of

output pins will stay the same. Find-

ing even one spare output for diagnos-

tics, test, or even standard I/O can be

a tussle. The single-pin “bus” in Figure

1 can provide an unlimited number of

parallel outputs with simple addition-

al hardware. A microcomputer output

with an RC lowpass filter controls se-

rial-to-parallel converter HC164. To

enter data into the serial-to-parallel

converter, each bit consists of a one-to-

zero-to-one transition, which alters the

length of the low state. If the low state

is longer than the lowpass filter’s time

constant, a zero shifts into the regis-

ter. If the low state is short, then a one

shifts into the register. The clock and

data signals thus combine into one sig-

nal. A lowpass filter separates the clock

and data signals ( Figure 2 ).

Listing 1 , a simple “Whip” routine,

V CC

INPUT

R 9

VCC

C 23

10 nF

V CC

OUTPUT_7

OUTPUT_6

IC 1

HC164

OUTPUT_5

OUTPUT_4

CLR

GND

CLK

OUTPUT_3

OUTPUT_2

OUTPUT_1

OUTPUT_0

Figure 1 This single-pin “bus” can provide an unlimited number of parallel

outputs with simple additional hardware.

74 EDN | june 21, 2007



design ideas

performs the output function for eight

bits. Assume that the RC time con-

stant is 3 msec, and the instruction

time should be 1 msec or less at a crys-

tal frequency of 4 MHz or greater. The

routine uses bitwise manipulation of

output My_Bit of port My_Port.

Although the circuit in Figure 1 can

control slow-reacting devices, such as

relays or LCDs, using it with LEDs

can give an annoying flicker when

the HC164 is writing. To address that

problem, the circuit in Figure 3 uses

another serial-in/parallel-out register,

the 4094, which has a strobe input to

allow simultaneous updates of all out-

puts without temporary levels. A twin

monostable circuit supplies the data

and strobe signals. This circuit should

be able to control parallel devices, such

as display modules based on HD44780

devices. EDN

INPUT

V CC

R 8

10k

C 24

10 nF

IC 1A

MC14538B

CLR

R 9

3.3k

C 23

1 nF

IC 1B

MC14538B

CLR

STR

CLK

OUTPUT_0

OUTPUT_1

OUTPUT_2

OUTPUT_3

OUTPUT_4

OUTPUT_5

OUTPUT_6

OUTPUT_7

V CC

IC 2

MC14094B

CLK

AT ARROW

Figure 2 The clock and data signals

combine into one signal.

Figure 3 This circuit uses another serial-in/parallel-out register, the 4094, which

has a strobe input to allow simultaneous updates of all outputs without tempo-

rary levels.

Simple dual constant-current load

tests low-current power supplies

John s lo Giudice, stmicroelectronics, schaumburg, il

derives from a TS431 1.25V 1% refer-

ence. Because the maximum voltage

can be 1.25V and the sense resistor’s

value is 1V, the maximum current per

channel can reach 1.25A.

R 2 and R 3 are 15-turn, 1-kV poten-

tiometers, which you can finely adjust

to the desired load. One can set a mini-

mum current, and the other can set a

maximum current. Switch S 1 can then

switch between minimum load, no

load in the middle position, and maxi-

mum load. Furthermore, by attaching

a standard DMM (digital multimeter)

across R 6 , you can directly read the cur-

rent and adjust it to the proper level.

Input-voltage change does not af-

fect the DMM’s reading because it

monitors the constant current through

sense resistor R 6 . The second channel

is a duplicate of the first. Each chan-

Today’s small electronic appli-

ances, such as washers, dryers,

and stoves, use switched-mode power

supplies to replace bulky, heavy, linear-

power supplies. The engineer testing

these power supplies, which range in

current from 50 mA to 1A, typically

uses resistors or standard off-the-shelf

electronic loads. An engineer would

employ a variety of high-wattage resis-

tors to verify multiple loading condi-

tions to satisfy a proper design. Most

off-the-shelf electronic loads target an

average of 300W. When measuring

50 to 300 mA, a display is inaccurate;

most of them display 0.1A, but accu-

racy is questionable at that low range.

You can alternatively use the simple

dual constant-current-load design in

Figure 1 , which you can build with in-

expensive, common parts.

The load current passes through a

MOSFET and a 1%, 1V sense resistor,

R 6 . Pin 2 of IC 1A compares the voltage

drop in the resistor to a reference volt-

age. IC 1 , an LM358 op amp, compares

the two inputs and adjusts its output

accordingly. The reference voltage at

Pin 3 of IC 1A comes from a voltage-di-

vider potentiometer, R 2 or R 3 , which

76 EDN | june 21, 2007



design ideas

CH A

INPUT

C 4

0.1 �F

S 1

R 1

1.5k

R 15

3.6k

V�

R 4

SINGLE POLE

TRIPLE THROW

S 3

0 CLOSE

IC 1A

LM358

C 3

0.1 �F

OUT

R 2

POTENTIOMETER

MAXIMUM

R 3

POTENTIOMETER

MINIMUM

R 14

100k

D 2

LED

Q 1

IRFP450

C 1

47 �F

50V

IC 2

TS431

V�

C 8

47 �F

50V

C 2

0.01 �F

R 5

100k

�

R 6

V 1

V DC

CH A

RETURN

CH B

INPUT

S 2

R 7

1.5k

V�

R 10

SINGLE POLE

TRIPLE THROW

OUT

IC 1B

LM358

R 8

POTENTIOMETER

MAXIMUM

R 9

POTENTIOMETER

MINIMUM

C 6

0.1 �F

R 13

100k

Q 2

IRFP450

C 7

47 �F

50V

V�

IC 3

TS431

C 5

0.01 �F

R 11

100k

R 12

CH B

RETURN

Figure 1 This dual constant-current load can measure the performance of dual power supplies supplying 0 to 1.25A per

channel.

nel can control 0 to 1.25A and can

handle a voltage of 3 to 50V. The ca-

pacitor input and the MOSFET set the

upper limit. The two inputs can be in

parallel to a load of 2.5A. For a two-

output power supply, you can set the

minimum and maximum current by

precisely reading the level on a multi-

meter and then quickly testing a ma-

trix of no load, minimum load, and

maximum load. A 9V battery powers

the unit. EDN

Stepper-motor motion controller and

driver fit into a CPLD/FPGA

stephan roche, santa rosa, Ca

cel results in a slow acceleration/decel-

eration, and a low value results in a fast

acceleration/deceleration. The inputs

of the CPLD stepper-motor controller

are clock, direction, full/half-step, re-

set, Nstep, start, and stop.

The clock input is active on the pos-

itive edge of the clock pulse. The max-

imum motor speed is one step every

16 clocks. The direction input deter-

mines the motor’s rotational direction.

The motor runs clockwise or counter-

This Design Idea further devel-

ops a previous one integrating a

stepper-motor driver in a CPLD ( Ref-

erence 1 ). However, this idea integrates

not only the driver, but also a simple

one-axis stepper-motor motion control-

ler. Depending on the size of the tar-

get CPLD, you can implement multiple

motion controllers into a single device.

For example, a single-axis motion con-

troller fits into a Xilinx (www.xilinx.

com) XC95108 using 68 of, or 63% of,

the available macrocells. The motion

controller rotates the stepper motor

clockwise or counterclockwise a given

number of steps with a given speed pro-

file versus time. When a motion begins,

the controller accelerates until it reach-

es the cruise speed and then decelerates

before stopping ( Figure 1 ).

The controller can adjust the motor

speed to 16 values, V5V MAX 3speed/16,

where speed is an integer with a value

of one to 16. During the acceleration

phase, the speed ramps up by increasing

from one to 16; during the cruise phase,

speed stays at 16; finally, during the de-

celeration phase, speed ramps down

to one before stopping. If

there are insufficient steps

for the controller to reach

the cruise phase, the con-

troller goes directly from

the acceleration phase to

the deceleration phase.

You can adjust the accel-

eration/deceleration rate

in the program, which you

can find at www.edn.com/

070621di1 by the constant

“accel,” which can be one

to 255. A high value of ac-

CRUISE

ACCELERATION

MOTOR

SPEED

DECELERATION

TIME

Figure 1 This design can control the motor with

16 speeds. The maximum speed in the cruise

phase is such that the motor makes a step or

half-step every 16 clock cycles.

78 EDN | june 21, 2007



design ideas

V CC

V D

clockwise, depending on the level of

this input and the motor connections.

That value is latched at the first rising

clock edge after start goes high. The

full/half-step input determines the an-

gular rotation of the motor for each

clock pulse. In the low state, the mo-

tor makes a full step for each applied

clock pulse, and, in the high state, the

motor makes a half-step. A high level

on the reset input sets the motor in a

defined state. The motor ignores any

clock pulse when reset is high. The

16-bit Nstep value defines the number

of steps the next motion will perform.

That value is latched at the first ris-

ing clock edge after start goes high. A

high level on the start input starts the

motion, and a high level on the stop

input stops the motion, aborting the

current motion.

The outputs of the CPLD stepper-

motor driver are A, A_N, B, and B_

N ( Figure 2 ). The A and A_N out-

puts control one of the motor’s coils

through power drivers, and the B and

B_N outputs control the motor’s sec-

ond coil through power drivers.

L 1

A_N

L 2

CLOCK

CW_CCW

CPLD

L 3

L 4

FULL_HALF_STEP

V D

RESET

NSTEP

V D

START

STOP

B_N

Figure 2 The FPGA/CPLD requires external drivers.

The CPLD/FPGA cannot directly

drive the motor, so it requires external

drivers. The driver must arrive at the

motor’s nominal voltage. The Schottky

diodes at the output of each driver al-

low current freewheeling in the motor

coils. If you use MOSFET drivers, exter-

nal Schottky diodes should be unnec-

essary because MOSFETs have built-in

diodes; the Microchip (www.microchip.

com) TC4424A dual driver can drive

motor coils to 18V and 3A. EDN

R e f e R e n c e

Roche, Stephan, “Implement a

stepper-motor driver in a CPLD,”

EDN , Feb 15, 2007, pg 90, www.

edn.com/article/CA6413791.

80 EDN | june 21, 2007

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