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design
ideas
Edited by Bill Travis
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8
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Data-acquisition system uses fault protection
Catherine Redmond, Analog Devices, Limerick, Ireland
in aircraft, must withstand fault
conditions, thereby avoiding
component and system damage, be-
cause a sensor failure could cause a
catastrophic event to occur. A channel
protector, comprising two n-channel
MOSFETs connected in series with a
p-channel MOSFET, can protect sen-
sitive components from voltage tran-
sients in the signal path, whether or
not the power supplies are present
(
Figure 1
). The channel protector
acts as series resistor during normal
operation. If the input exceeds the pow-
er-supply voltages, one of the MOSFETs
turns off, clamping the output within the
supply rails, thus protecting the circuitry
in the event of overvoltage or supply-loss
conditions. Because channel protectors
work regardless of the presence of the
supplies, they are also ideal for applica-
V
SS
When a fault condition occurs, the
voltage on the input of the channel
protector exceeds a voltage set by the
supply-rail voltage minus the MOS-
FET’s threshold voltage. For a positive
overvoltage, this voltage is V
DD
V
TN
,where V
TN
is the threshold volt-
age of the NMOS transistor (typical-
ly, 1.5V). In the case of a negative over-
voltage, the voltage is V
SS
PMOS
NMOS
NMOS
PMOS
V
TP
,where
V
TP
is the threshold voltage of the
PMOS device (typically,
V
DD
V
SS
V
DD
Figure 1
A channel protector can protect sensi-
tive circuitry from voltage transients.
2V). When
the input of the channel protector ex-
ceeds either of these voltages, the pro-
tector clamps the output within them.
These devices offer bidirectional fault and
overvoltage protection, so you can use the
inputs or outputs interchangeably.
Figure
3
shows the voltages and MOSFET states
for a positive-overvoltage event.
The output load limits the current
during the fault condition to V
CLAMP
/R
L
(
Figure 4
). If the supplies are off, the
protector limits the fault current to
nanoamps.
Figure 5
shows how you can
use the ADG466 channel protector to
protect the sensitive inputs of an instru-
mentation amp from a sensor fault. In
applications that require a multiplexer in
tions in which correct power sequencing
cannot be guaranteed and for hot-inser-
tion rack systems.
Figure 2
shows an
ADG465 channel protector with an input
signal that exceeds the power-supply volt-
age. The protector clamps the output sig-
nal, protecting the sensitive components
that follow the channel protector.
V
DD
V
S
S
Figure 2
V
IN
V
D1
V
S1
V
OUT
V
IN
ADG465
V
OUT
V
DD
V
DD
OUTPUT CLAMPED
AT V
DD
1.5V
Data-acquisition system
uses fault protection ......................................
69
Take steps to reduce
antiresonance in decoupling ......................
70
Precision level shifter has
excellent CMRR ..............................................
72
Celsius-to-digital thermometer works
with remote sensor ........................................
74
Quasiresonant converter uses
a simple CMOS IC..........................................
74
Simple circuit serves
as milliohmmeter ..........................................
78
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The channel protector clamps overvoltage transients to a safe level.
V
DD
–V
TN
13.5V
POSITIVE
OVERVOLTAGE
(20V)
NMOS
PMOS
NMOS
SATURATED
NONSATURATED
NONSATURATED
Figure 3
V
DD
15V
V
SS
–15V
V
DD
15V
NOTE:
V
TN
= NMOS-THRESHOLD VOLTAGE (1.5V).
The voltages and MOSFET states appear like this during a positive-overvoltage event.
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69
S
ENSITIVE SYSTEMS, such as those
design
ideas
addition to channel protection, you can
use the ADG439F fault-protected, four-
channel analog multiplexer
(
Figure 6
). These multiplex-
ers use a series n-channel, p-channel, n-
channel MOSFET connection. During
fault conditions, the inputs or outputs
appear as open circuits, protecting the
sensor or signal source as well as the
output circuitry.
V
D
V
G
V
DD
15V
V
S
V
13.5V
20V
Figure 4
PMOS
NMOS
N+
N+
N+
NONSATURATED
OPERATION
R
L
V
CLAMP
OVERVOLTAGE
OPERATION
(SATURATED)
EFFECTIVE
SPACE-CHARGE
REGION
N-CHANNEL
I
OUT
V
G
– V
T
=13.5V
V
T
= 1.5V
P–
The output load limits the current to V
CLAMP
/R
L
during a fault condition.
ADG466
ADG439F
–
SENSOR 1
+
ADC
DSP
SENSOR 1
–
ADC
DSP
+
IN AMP
SENSOR 4
IN AMP
ANALOG OUT
TO ACTUATOR
DAC
REFERENCE
ANALOG OUT
TO ACTUATOR
DAC
REFERENCE
Figure 5
In this circuit, the ADG466 channel protector guards the sensi-
tive inputs of an instrumentation amplifier from a sensor fault.
Figure 6
A multiplexer in a data-acquisition system protects the signal source as well
as the output circuitry.
Take steps to reduce antiresonance in decoupling
Dale Sanders, X2Y Attenuators, LLC, Farmington Hills, MI
boards, you need multiple capaci-
tors to decouple the power-distri-
bution system. A typical configuration
might comprise five capacitors connect-
ed in parallel between the power and the
ground traces or planes. To provide
broadband decoupling per-
formance, assume the indi-
vidual values of the capacitors are 470,
1, 10, 100, and 220 nF (
Figure 1
). This
parallel network provides 801-nF total
capacitance to the power-distribution
system. If you measure each capacitor
10
0
10
20
VOLTAGE
(dB
V)
30
40
50
60
Figure 2
70
80
10 kHz
10 kHz
1 MHz
10 MHz
100 MHz
1 GHz
10 GHz
FIVE STANDARD CAPACITORS: 470, 1, 10, 100,
220-nF (801-nF TOTAL CAPACITANCE)
ONE STANDARD 1206 10-nF CAPACITOR
ONE STANDARD 1206 220-nF CAPACITOR
BOARD S21
ONE STANDARD 1206 1-nF CAPACITOR
ONE STANDARD 1206 1000-nF CAPACITOR
ONE STANDARD 1206 470-nF CAPACITOR
POWER
Measurements with a vector-network analyzer reveal undesirable antiresonance effects.
0.801 F
TOTAL
with a vector-network analyzer, you can
identify each capacitor’s SRF (self-res-
onant frequency).
Figure 2
is a plot of
each capacitor’s SRF, as well as the SRF
of the overall parallel connection. Each
SRF can cause antiresonance in the par-
allel decoupling configuration. The
antiresonance occurs when one ca-
pacitor is still capacitive, while another
has become inductive.
POWER
A
470 nF
1 nF
10 nF
100 nF
220 nF
G1
G2
400 nF
(801 nF TOTAL)
B
GROUND
RETURN
Figure 1
Figure 3
A typical decoupling configuration uses several
multilayer-ceramic capacitors connected in
parallel.
A 400-nF X2Y capacitor yields a total decou-
pling capacitance of 800 nF.
70
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APRIL 15, 2004
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T
O MAINTAIN POWER integrity on pc
design
ideas
A way to considerably reduce the an-
tiresonance effects is to use a single 400-
nF X2Y capacitor for decoupling. (Ca-
pacitors using X2Y technology are
available, for example, from Johanson
Dielectrics (www.johansondielectrics.
com). You measure the capacitance rat-
ing for an X2Y component
from line to ground; in oth-
er words, from an A or a B terminal to
either of the G1 or G2 terminals in
Fig-
ure 3
. So, the total capacitance a 400-nF
X2Y component supplies, connected as
in
Figure 3
would be double the capac-
itance rating, or 800 nF.
Figure 4
shows
that a single X2Y capacitor with the
same total capacitance as in
Figure 1
provides the same broadband decou-
10
0
10
20
30
VOLTAGE
(dB
V)
40
50
60
Figure 4
70
80
10 kHz
10 kHz
1 MHz
10 MHz
100 MHz
1 GHz
10 GHz
FIVE STANDARD CAPACITORS: 470, 1, 10, 100,
220nF (801-nF TOTAL CAPACITANCE)
1 X2Y 1206 400 nF
BOARD S21
The single X2Y decoupling capacitor displays no antiresonance effects.
pling as the standard decoupling con-
figuration but without the antireso-
nance effects. In addition, because X2Y
components come in the same package
sizes as standard capacitors (1812, 1210,
1206, 0805, and 0603), the use of X2Y
components saves pc-board space and
reduces layout complexity.
Precision level shifter has excellent CMRR
Ronald Mancini, Texas Instruments, Bushnell, FL
level shifters with
op amps and 1%-
tolerance discrete resis-
tors. Discrete-resistor
mismatching limits the
op amp’s CMMR (com-
mon-mode rejection ra-
tio) to 40 dB, so you can-
not use op amps in
circuits that require high
CMRR. Differential am-
plifiers contain precision
matched internal resis-
tors, so ICs such as the
INA133 can readily
achieve CMRRs of ap-
proximately 90 dB. They
can offer such high
CMRR by trim-
ming internal matched
resistors. Assume that
each input in the circuit of
Figure 1
has an associated noise voltage
(V
N1
,V
N2
, and V
NREF
). The transfer func-
tion of the amplifier circuit is
V
OUT
V
NREF
.
Now, you need to elim-
inate the reference noise
to obtain a clean level-
shifted signal. You could
connect the X end of C
1
to
ground to shunt the ref-
erence noise to ground,
but this solution may be
ineffective because the
source impedance of the
reference is low. When,
however, you connect the
X end of C
1
to the V
IN1
sig-
nal source, the differential
amplifier acts as a lowpass
filter and rejects the refer-
ence noise. This circuit
keeps the input imped-
ance of the differential
amplifier low (approxi-
mately 25 k
V
IN1
V
REF
V
IN1
25k
25k
SENSE
–IN
+
V
_
25k
V
OUT
V
IN2
+
+IN
–V
25k
INA133
V
REF
C
1
Figure 1
X
C
1
allows the level shifter to act as a lowpass filter that rejects the reference noise.
for the
INA133) to facilitate
matching. Thus, you must keep the signal
source impedance low to prevent gain er-
rors. The source impedance should be
less than 1/1000 the input impedance to
minimize gain error. If this situation
doesn’t occur naturally, then it is best to
buffer the inputs.
V
N1
). Note that the reference volt-
age shifts the output signal, either single
or differential. Once this level shifting oc-
curs, you can turn your attention to the
(V
REF
V
NREF
)
(V
IN2
V
N2
)
noise cancellation. Careful cabling and
differentially coupling the signal into the
differential amplifier’s inputs force the
noise on the signal inputs to be equal
(V
N1
72
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|
APRIL 15, 2004
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V
IN2
M
OST designers make
(V
IN1
V
N2
). The input noise is a com-
mon-mode signal, so the differential am-
plifier rejects it to the best of its ability
(nominally, 90 dB). Now, V
OUT
design
ideas
Celsius-to-digital thermometer
works with remote sensor
Elana Lian and Chau Tran, Analog Devices, Wilmington, MA
Y
OU CAN USE a single-
supply system to pre-
cisely measure the
temperature at a remote
location with less than
1
R
1
combination of R
1
and R
2
develops a 1V drop, and
you adjust R
2
to provide a
nominal current of 353.15
2k
R
3
R
F
50k
50k
R
2
1k
A. Thus, the current
through the feedback re-
sistor, R
F
, varies from
V
DD
C error over a 0 to
100
_
C range (
Figure 1
).
The circuit includes T
1
,a
low-cost AD590 tempera-
ture sensor; IC
1
, an
AD8541 rail-to-rail am-
plifier; four resistors; a
trimming potentiometer;
and an ADC. You can
omit the ADC if you need
an analog output. You
could replace the trim-
ming potentiometer with
an AD8400 or AD5273
digital potentiometer for easier calibra-
tion. The feedback resistor, R
F
, should be
a precision resistor to minimize the scale-
factor error, but the accuracy of the re-
maining resistors is not critical. You can
choose the grade of the AD590 sensor to
achieve the required accuracy.
The AD590 provides an output current
proportional to absolute temperature (1
IC
1
OUT
AD7476
DIGITAL-
DATA
OUTPUT
80
V
IN
AD8541
A as the temper-
ature varies from 0 to
100
20
+
GND
C. The voltage across
this resistor varies from
LONG
WIRES
R
4
200k
1V. The 4V offset
causes the output voltage
of the amplifier to vary
from 0 to 5V.
To guarantee the accu-
racy of 1
4 to
–
+
T
1
AD590
This system precisely measures temperature at a remote
location, with less than 1
C throughout
the range, you need to per-
form a calibration proce-
dure. At a known temperature, such as
25
C error over a 0 to 100
C range.
low-power, rail-to-rail operational am-
plifier. It has a high common-mode volt-
age range and extremely low bias cur-
rents. You can calibrate out its 1-mV
typical offset, the resistor, and AD590 er-
rors. The output swing of the amplifier
is 25 mV to 4.965V with a single 5V pow-
er supply, limiting the output by about
0.5
C, adjust trimming potentiometer R
2
to obtain the desired voltage at the out-
put of the amplifier, 1.250V, or the de-
sired code at the output of the ADC,
400H. Once you perform the calibration,
you can calculate the temperature in Cel-
sius at any measured point inside the
range by multiplying the output voltage
by 20. Because the sensor has a current
output, it is immune to voltage-noise
pickup and voltage drops in the signal
leads; you can thus use it at a remote lo-
cation. You should use a twisted-pair or
shielded cable.
C on either end.
This circuit can derive its power from
a single 5V power supply. The output of
the AD590 varies from 273.15 to 373.15
A/K). In this application, the circuit off-
sets and scales the output to provide a
full-scale range of 0 to 5V with a scale fac-
tor of 50 mV/
C over the chosen tem-
perature range of 0
A as the temperature varies from 0 to
100
C—the freezing
point of water—to 100
C. The positive input of the AD8541
has an offset of 4V to provide sufficient
headroom for the AD590. The series
C, the boiling
point of water. The AD8541 is a low-cost,
Quasiresonant converter uses a simple CMOS IC
Francesc Casanellas, Aiguafreda, Spain
ply that has low noise and uses a sim-
ple CMOS 4093 IC for its control.
The electrical noise of a converter arises
mainly when current switches on. Diode
recovery and charging parasitic capaci-
tances create high di/dt, which is the main
cause of noise. The converter in
Figure 1
(pg 76) has a low noise level, because it
slowly switches current on at nearly zero
voltage. The converter works in the
boundary between discontinuous and
continuous mode and switches on when
the drain voltage is at its lowest value. To
avoid working with low gate voltages,
which would cause excessive MOSFET
losses, ZD
1
conducts and enables the in-
put gate of the 4093 when the voltage is
high enough. When the supply starts, the
auxiliary nonisolated winding through D
3
keeps the gate input high. When the
MOSFET is on, current increases linearly
until the base of Q
5
starts to conduct, and
this transistor turns the MOSFET off. The
flyback operation then starts, and the pri-
mary energy charges the output capaci-
tors. During this phase of operation, D
5
and R
6
keep Q
5
conducting and the MOS-
FET off. When the energy has discharged,
(continued on pg 78)
74
EDN
|
APRIL 15, 2004
www.edn.com
to
Figure 1
F
IGURE 1
SHOWS a flyback power sup-
design
ideas
V
CC
C
4
R
4
D
3
D
6
ZD
1
4.7V
R
5
10k
R
3
C
3
+
V
OUT
D
4
C
7
D
5
D
2
+
C
5
33 F
5
6
14
2222
R
6
8.2k
D
1
ZD
3
15V
Q
3
14
Q
1
1
8
9
R
16
100
C
1
1 F
3
10
2
4093
R
15
4.7k
7
Q
2
R
17
R
7
1k
R
2
4.7k
12
13
11
2907
C
6
47 pF
OC
1
4N35
R
13
C
2
100
Q
5
R
8
R
10
470
R
1
22k
Q
4
F
C
10
2369
R
9
1k
2369
R
12
470k
C
9
1 nF
R
11
ZD
2
C
8
TL431
R
14
Figure 1
Using a simple CMOS IC, this flyback power-supply circuit exhibits extremely low noise.
76
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