AT91SAM7S64_DS.PDF
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Atmel AT91SAM7S64 Datasheet
Features
•
Incorporates the ARM7TDMI
®
ARM
®
Thumb
®
Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE In-circuit Emulation, Debug Communication Channel Support
•
64 Kbytes of Internal High-speed Flash, Organized in 512 Pages of 128 Bytes
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions,
Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,
Flash Security Bit
– Fast Flash Programming Interface for High Volume Production
•
16 Kbytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
•
Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
•
Reset Controller (RSTC)
– Based on Power-on Reset and Low-power Factory-calibrated Brownout Detector
– Provides External Reset Signal Shaping and Reset Source Status
•
Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
•
Power Management Controller (PMC)
– Software Power Optimization Capabilities, Including Slow Clock Mode (Down to
500 Hz) and Idle Mode
– Three Programmable External Clock Signals
•
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
•
Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
•
Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
•
Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
•
Real-time Timer (RTT)
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
•
One Parallel Input/Output Controller (PIOA)
– Thirty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
•
Eleven Peripheral DMA Controller (PDC) Channels
•
One USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 328-byte Configurable Integrated FIFOs
•
One Synchronous Serial Controller (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
AT91 ARM
®
Thumb
®
-based
Microcontrollers
AT91SAM7S64
Preliminary
6070B–ATARM–25-Feb-05
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
•
Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Line Support on USART1
•
One Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
•
One Three-channel 16-bit Timer/Counter (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
•
One Four-channel 16-bit PWM Controller (PWMC)
•
One Two-wire Interface (TWI)
– Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
•
One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
•
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
•
5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each
•
Power Supplies
– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
– 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
– 1.8V VDDCORE Core Power Supply with Brownout Detector
•
Fully Static Operation: Up to 55 MHz at 1.65V and 85
°
C Worst Case Conditions
•
Available in a 64-lead LQFP Package
1. Description
Atmel’s AT91SAM7S64 is a member of a series of low pincount Flash microcontrollers based on
the 32-bit ARM RISC processor. It features a 64 Kbyte high-speed Flash and a 16 Kbyte SRAM,
a large set of peripherals, including a USB 2.0 device, and a complete set of system functions
minimizing the number of external components. The device is an ideal migration path for 8-bit
microcontroller users looking for additional performance and extended memory.
The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via
a parallel interface on a production programmer prior to mounting. Built-in lock bits and a secu-
rity bit protect the firmware from accidental overwrite and preserves its confidentiality.
The AT91SAM7S64 system controller includes a reset controller capable of managing the
power-on sequence of the microcontroller and the complete system. Correct device operation
can be monitored by a built-in brownout detector and a watchdog running off an integrated RC
oscillator.
The AT91SAM7S64 is a general-purpose microcontroller. Its integrated USB Device port makes
it an ideal device for peripheral applications requiring connectivity to a PC or cellular phone. Its
aggressive price point and high level of integration pushes its scope of use far into the cost-sen-
sitive, high-volume consumer market.
2
AT91SAM7S64 Preliminary
6070B–ATARM–25-Feb-05
AT91SAM7S64 Preliminary
2. Block Diagram
Figure 2-1.
AT91SAM7S64 Block Diagram
TDI
TDO
TMS
TCK
JTAG
SCAN
ICE
ARM7TDMI
Processor
JTAGSEL
1.8 V
Voltage
Regulator
VDDIN
TST
System Controller
GND
VDDOUT
FIQ
VDDCORE
AIC
IRQ0-IRQ1
Memory Controller
SRAM
16 Kbytes
VDDIO
PCK0-PCK2
Embedded
Flash
Controller
Address
Decoder
PLLRC
PLL
XIN
XOUT
PMC
Abort
Status
Misalignment
Detection
OSC
VDDFLASH
RCOSC
Flash
64 Kbytes
ERASE
VDDCORE
BOD
Peripheral Bridge
VDDCORE
POR
Reset
Controller
Peripheral DMA
Controller
PGMRDY
PGMNVALID
PGMNOE
PGMCK
PGMM0-PGMM3
NRST
Fast Flash
Programming
Interface
11 Channels
PIT
PGMD0-PGMD15
PGMNCMD
PGMEN0-PGMEN2
WDT
APB
RTT
DRXD
DTXD
DBGU
PDC
PDC
FIFO
USB Device
DDM
DDP
PIOA
RXD0
TXD0
SCK0
RTS0
CTS0
PDC
PWMC
PWM0
PWM1
PWM2
PWM3
USART0
PDC
TF
TK
TD
RD
RK
RF
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
PDC
RXD1
TXD1
SCK1
RTS1
CTS1
DCD1
DSR1
DTR1
RI1
PDC
SSC
USART1
PDC
Timer Counter
PDC
PDC
TC0
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TC1
TC2
SPI
PDC
TWI
TWD
TWCK
ADTRG
PDC
AD0
AD1
AD2
AD3
ADC
AD4
AD5
AD6
AD7
ADVREF
3
6070B–ATARM–25-Feb-05
3. Signal Description
Table 3-1.
Signal Description List
Signal Name
Function
Type
Active
Level
Comments
Power
VDDIN
Voltage Regulator Power Supply Input
Power
3.0V to 3.6V
VDDOUT
Voltage Regulator Output
Power
1.85V nominal
VDDFLASH
Flash Power Supply
Power
3.0V to 3.6V
VDDIO
I/O Lines Power Supply
Power
3.0V to 3.6V
VDDCORE
Core Power Supply
Power
1.65V to 1.95V
VDDPLL
PLL
Power
1.65V to 1.95V
GND
Ground
Ground
Clocks, Oscillators and PLLs
XIN
Main Oscillator Input
Input
XOUT
Main Oscillator Output
Output
PLLRC
PLL Filter
Input
PCK0 - PCK2
Programmable Clock Output
Output
ICE and JTAG
TCK
Test Clock
Input
No pull-up resistor
TDI
Test Data In
Input
No pull-up resistor
TDO
Test Data Out
Output
TMS
Test Mode Select
Input
No pull-up resistor
JTAGSEL
JTAG Selection
Input
Pull-down resistor
Flash Memory
ERASE
Flash and NVM Configuration Bits Erase
Command
Input
High
Pull-down resistor
Reset/Test
NRST
Microcontroller Reset
I/O
Low
Pull-Up resistor
TST
Test Mode Select
Input
Pull-down resistor
Debug Unit
DRXD
Debug Receive Data
Input
DTXD
Debug Transmit Data
Output
AIC
IRQ0 - IRQ1
External Interrupt Inputs
Input
FIQ
Fast Interrupt Input
Input
4
AT91SAM7S64 Preliminary
6070B–ATARM–25-Feb-05
AT91SAM7S64 Preliminary
Table 3-1.
Signal Description List (Continued)
Signal Name
Function
Type
Active
Level
Comments
PIO
PA0 - PA31
Parallel IO Controller A
I/O
Pulled-up input at reset
USB Device Port
DDM
USB Device Port Data -
Analog
DDP
USB Device Port Data +
Analog
USART
SCK0 - SCK1
Serial Clock
I/O
TXD0 - TXD1
Transmit Data
I/O
RXD0 - RXD1
Receive Data
Input
RTS0 - RTS1
Request To Send
Output
CTS0 - CTS1
Clear To Send
Input
DCD1
Data Carrier Detect
Input
DTR1
Data Terminal Ready
Output
DSR1
Data Set Ready
Input
RI1
Ring Indicator
Input
Synchronous Serial Controller
TD
Transmit Data
Output
RD
Receive Data
Input
TK
Transmit Clock
I/O
RK
Receive Clock
I/O
TF
Transmit Frame Sync
I/O
RF
Receive Frame Sync
I/O
Timer/Counter
TCLK0 - TCLK2
External Clock Inputs
Input
TIOA0 - TIOA2
I/O Line A
I/O
TIOB0 - TIOB2
I/O Line B
I/O
PWM Controller
PWM0 - PWM3
PWM Channels
Output
SPI
MISO
Master In Slave Out
I/O
MOSI
Master Out Slave In
I/O
SPCK
SPI Serial Clock
I/O
NPCS0
SPI Peripheral Chip Select 0
I/O
Low
NPCS1-NPCS3
SPI Peripheral Chip Select 1 to 3
Output
Low
5
6070B–ATARM–25-Feb-05
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